Refinement of AADL Models for Synthesis of Embedded Systems (RAMSES)

RAMSES (Refinement of AADL Models for Synthesis of Embedded Systems) is a model transformation and code generation tool that produces C code for POSIX, ARINC653, or OSEK compliant operating systems. RAMSES interfaces with OSATE2 and proposes a command-line interface to OSATE2. RAMSES proceeds by refinement insofar as it produces a simplified version of an AADL model as an intermediate step towards code generation. This simplified model includes a behavior annex subclause that expresses the behavior resulting from the expansion of AADL components.

RAMSES user manual

Installation and Use with OSATE

Generate Code from an Example

Sources and Bug Tracking

Developers: set up a development environment for RAMSES

 

Related Publications

Journal Papers

Conference Papers

[RBP15] S. Rahmoun, E. Borde and L. Pautet. Automatic selection and composition of model transformations alternatives using evolutionary algorithms. In 1st Workshop on Variability for Qualities in Software Architecture (VAQUITA’15), associated with the European Conference on Software Architecture (ECSA’15), Dubrovnik (Croatia), 2015.

[BRCPS14] E. Borde, S. Rahmoun, F. Cadoret, L. Pautet, F. Singhoff, P. Dissaux. Architecture Models Refinement for Fine Grain Timing Analysis of Embedded Systems. In International Symposium on Rapid System Prototyping (RSP), New Delhi (India), 2014.

[JBPR14] A. Jaouen, E. Borde, L. Pautet and T. Robert. PDP 4PS : Periodic-Delayed Protocol for Partitioned Systems. In 19th International Conference on Reliable Software Technologies (Ada-Europe 2014). 23-27 June 2014, Paris, France.

[CRBPS13] F. Cadoret, T. Robert, E. Borde, L. Pautet and F. Singhoff. Deterministic Implementation of Periodic-Delayed Communications and Experimentation in AADL. In 16th IEEE Symposium on Object/Component/Service-Oriented Real-time distributed Computing (ISORC’13), Paderborn (Germany), 2013.

[CBGP12] F. Cadoret, E. Borde, S. Gardoll, L. Pautet. Design Patterns for Rule-based Refinement of Safety Critical Embedded Systems Models. In 17th IEEE International Conference on Engineering of Complex Computer Systems, Paris, FRANCE, july 2012.